不是很好的电磁兼容(EMC)设计指导|Not-So-Good EMC Design Guidelines

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Not-So-Good EMC Design Guidelines

These design guidelines are either too vague, do not apply often enough to be useful, or are just wrong.

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Circuit Board Layout

Nets driven at faster than 1V/ns slew rate must have a discrete series resistor at the source.

Whether or not you need to add a discrete resistor at the source depends many things, but (generally speaking) the slew rate is not one of them.

Capacitively-loaded nets must have a total source impedance equal to or greater than one-quarter of the line characteristic impedance or a series resistor must be added to meet this condition.

This is not one of them either.

Guard traces should be used to isolate high-speed nets from I/O nets.

Guard traces are not useless, but they are not useful often enough to warrant a mention in anybody's list of design guidelines. We recommend that you not use guard traces unless there is a specific known problem you are trying to address.

All power and ground traces must be at least three times the nominal signal line width.

Not a bad sentiment, but not always necessary or sufficient.

Additional decoupling capacitors should be placed on both sides of a power or ground plane gap.

Ground Plane Gap?!! Don't gap the ground plane! Gap the power plane all you want, but we can't think of any compelling reason to put additional decoupling on both sides of the gap. This was probably conceived as a method for reducing coupling between two power bus structures, but the decoupling capacitors are unlikely to be effective at the frequencies where this type of coupling is likely to be a problem.

Critical nets should be routed in a daisy chain fashion with no stubs or branches.

Sometimes, yes. Sometimes, no.

Cards and enclosures should be designed so that their resonances do not match harmonics of system clock frequencies.

Theoretically, this is a good idea. In practice, it is not reasonable to expect that a designer controls all the parameters that affect resonant frequencies of cards or enclosures. Attempts to do so waste resources and may compromise the integrity of the design.