电磁兼容小小家

 找回密码
 注册
查看: 2338|回复: 0

电磁兼容(EMC)设计指导软件介绍|EMC Design Rule Checkers

[复制链接]
发表于 2007-12-10 08:36:24 | 显示全部楼层 |阅读模式

老伙计,请登录,欢迎回家

您需要 登录 才可以下载或查看,没有帐号?注册

x

EMC Design Rule Checkers

EMC design rule checkers provide an automated method for reviewing circuit board layouts to ensure that certain EMC design guidelines have been adhered to. Most design rules require information about component placement, trace routing and the signals on each trace. All of the rule checkers listed here are capable of reading board layout files to automatically obtain trace routing information. Information about the components and signals is obtained by one or more of the following methods:

  • Manually input by the user
    • Can be extremely tedious, especially for boards with hundreds of nets.
    • Requires that the user be knowledgeable about signals on each net.
  • Inferred from net names
    • Substrings such as "+3v", "gnd" or "clk" in a net name often provide important clues as to the nature of the signal on that trace.
    • Requires consistent naming conventions and can not provide detailed information about the nature of the signal required for many guidelines.
  • Obtained from "net classification" algorithms
    • Requires a component database.
    • Usually only practical when the rule checker is part of larger design environment.
  • Obtained from IBIS files or circuit simulations.
    • Some of the most critical signals on a circuit board may have been simulated for signal integrity purposes.
    • Some design rule checkers can import simulation data.

The Clemson Vehicular Electronics Laboratory does not endorse any specific design rule checking software; however the following products (listed alphabetically) all have the ability to apply built-in and user-defined design guidelines to a variety of printed circuit board layouts.


EMISTREAM

NEC Informatec Systems, Ltd.
a subsidiary of NEC Corporation
Tokyo, Japan

EMC design rule checking software running under Windows that reads Allegro, Protel, Board Station and other board layout files. Nets are manually assigned properties in a spreadsheet environment.


EMSAT

Moss Bay EDA
Kirkland, WA, USA
Phone: 206-779-5345

EMSAT is an EMC design rule checker developed by IBM. It is optimized for the Allegro environment and can be launched from the cockput of the Allegro PCB Editor. The software is also capable of reading DSN files and output files can be viewed on the companion product, EMSAT-UV. EMSAT runs under Windows, Linux or AIX. The program provides tagging capabilities for the various nets/traces that are critical for EMC, indicating which are I/O nets, power nets, ground, etc.


Zuken CR-5000 Lightning EMC

Zuken, Inc.
Yokohama, Japan

Lightning EMC provides EMC design rule checking capability within the Zuken CR-5000 board development environment. Because the environment already has information on the nets and their signals, it is not necessary to manually identify most types of nets. This product cannot be run as a stand-alone rule checker.

发表回复

您需要登录后才可以回帖 登录 | 注册

本版积分规则

QQ|小黑屋|电磁兼容网 电磁兼容小小家 EMC工程师家园 电磁兼容(EMC)小小家学习园地

GMT+8, 2024-12-26 01:21 , Processed in 0.079434 second(s), 19 queries .

快速回复 返回顶部 返回列表