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发表于 2008-7-23 05:49:32
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引用第13楼sunny_su于2008-07-20 21:52发表的“”:
Hi cloud,
I don't know your experience. As I know, the vendor of chip will never provide the desing/layout to their user. Except the degin guide. do you have any other suggestion?
Yes, the signal loop should be connected well.
Yes. You are right. If you are designing a critical circuit, cost sensitive and with big quantity, you should be able to check with chip supplier to get part of the layout in the chip. We have some experience with Freescale.
If you could not get it. Then, you will have to spend some time to search where to put the right filter. This, of course will be a time-consuming and boring job. |
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